Embedded System HLS with Vitis: Communication with Software

Mohammad Hosseinabady
6 min readDec 21, 2019

Traditionally, FPGA was meant to be used by hardware engineers. And only designers with great hardware knowledge could use them. These designers should use one of the hardware description languages (HDL) such as VHDL or Verilog and should follow a cycle-accurate design methodology. This approach makes debugging and verification very difficult and time-consuming. Therefore, several unique…

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Mohammad Hosseinabady

Designing digital systems and accelerating functions with HLS for FPGAs are fun.